Anas A. Salameh and Kho Mei Ye 2025. Design and Optimization of Coarse-Grained Reconfigurable Array (CGRA) Architecture for Efficient Processing-in-Memory (PIM) Systems. Journal of VLSI Circuits and Systems. 7, 1 (Jan. 2025), 11–18. DOI:https://doi.org/10.31838/jvcs/07.01.02.