J. Sravana, K.S. Indrani, Mohammad khadir, M. Saranya, P. Sai Kiran, C. Reshma, & Vallabhuni Vijay. (2022). Realısatıon of Performance Optımısed 32-Bıt Vedıc Multıplıer. Journal of VLSI Circuits and Systems, 4(2), 14–21. https://doi.org/10.31838/jvcs/04.02.03