ANAS A. SALAMEH; KHO MEI YE. Design and Optimization of Coarse-Grained Reconfigurable Array (CGRA) Architecture for Efficient Processing-in-Memory (PIM) Systems. Journal of VLSI Circuits and Systems, [S. l.], v. 7, n. 1, p. 11–18, 2025. DOI: 10.31838/jvcs/07.01.02. Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/147. Acesso em: 22 jan. 2025.