J, P.; RAMU, B. Energy-Efficient GNRFET-Based Ternary Full Adder for Next-Generation Integrated Circuits. Journal of VLSI Circuits and Systems, [S. l.], v. 7, n. 1, p. 94–105, 2025. DOI: 10.31838/jvcs/07.01.12. Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/184. Acesso em: 25 jun. 2025.