VEERESH KUMASAGI; PATIL, V. Energy-Efficient High Performance 64-bit ALU using Reversible Logic Based on Self Error Detection and Correction Technique. Journal of VLSI Circuits and Systems, [S. l.], v. 7, n. 1, p. 198–209, 2025. DOI: 10.31838/JVCS/07.01.21. Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/213. Acesso em: 8 oct. 2025.