CHANDRA SHAKER PITTALA; J. SRAVANA; G. AJITHA; S. LAKSHAMANACHARI; V. VIJAY; S. CHINA VENKATESWARLU. Novel Architecture for Logic Test Using Single Cycle Access Structure. Journal of VLSI Circuits and Systems, [S. l.], v. 3, n. 1, p. 1–6, 2021. DOI: 10.31838/jvcs/03.01.01. Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/25. Acesso em: 22 dec. 2024.