KOMMA YASASWI RAJ; GUNDU SAI VIPUL; GOTTIPATI RAVINDRA; RUDRU GOPI VENKATA KRISHNA; SADULLA SHAIK. Design and Performance Analysis of High Speed 8-T Full Adder . Journal of VLSI Circuits and Systems, [S. l.], v. 3, n. 2, p. 1–10, 2021. DOI: 10.31838/jvcs/03.02.01 . Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/28. Acesso em: 22 dec. 2024.