J. SRAVANA; K.S. INDRANI; MOHAMMAD KHADIR; M. SARANYA; P. SAI KIRAN; C. RESHMA; VALLABHUNI VIJAY. Realısatıon of Performance Optımısed 32-Bıt Vedıc Multıplıer. Journal of VLSI Circuits and Systems, [S. l.], v. 4, n. 2, p. 14–21, 2022. DOI: 10.31838/jvcs/04.02.03. Disponível em: https://vlsijournal.com/index.php/vlsi/article/view/44. Acesso em: 16 oct. 2024.