G, R., D, V. and M, A. (2024) “Development of Synthesizable Filter-Centric Loop Filter Design for ADPLL Architecture in SoC”, Journal of VLSI Circuits and Systems, 6(2), pp. 1–13. Available at: https://vlsijournal.com/index.php/vlsi/article/view/110 (Accessed: 28 September 2024).