U. G. Patil, Prabodh Jagtap, Kedar Adake, Sanika Dhanbhar, and Ajay Paithane. “Efficient VLSI Architecture Integrating Vedic Mathematics for Square Computation”. Journal of VLSI Circuits and Systems 7, no. 1 (April 9, 2025): 66–74. Accessed July 8, 2025. https://vlsijournal.com/index.php/vlsi/article/view/157.