Supriya B K, Arunraja A, Bremiga Gopalan Gandhimathi, S Sheeba Rani, N Sudhakar Reddy, Deepali Rani Sahoo. DFT Aware Test Architecture for Communication ICs: ATPG- Based Fault Detection on Lower Technology Node. Journal of VLSI Circuits and Systems [Internet]. 2025 Jul. 4 [cited 2025 Jul. 6];7(1):106-17. Available from: https://vlsijournal.com/index.php/vlsi/article/view/187