Low Power System on Chip Implementation of Adaptive Intra Frame and Hierarchical Motion Estimation in H.265

Abstract

Over the years, video compression standards have evolved and helped distribute multimedia content with greater ease. H.265 or High Efficiency Video Coding (HEVC) is one of the best lossy video codecs released as successor to H264 which offers better compression. This analysis is focused on tackling the computation needs of H.265 encoding through System on Chip (SoC) based implementations. The SoC platform has both ARM and FPGA architectures to handle floating point and fixed-point operations with parallelism respectively. The intended methodology is implemented using adaptive intra-frame prediction and hierarchical motion estimation suitable for SoC implementation to bridge the current gap. The innovation of this approach is that the parallel processing capabilities built into SoCs are used to improve intra-frame prediction and motion estimation efficiency. This proposed method involves the adaptive mechanisms for intra-frame prediction as well as a hierarchical structure of motion estimation to balance computational load and resource consumption. In conventional intra prediction, all the 35 modes are implemented, and the best mode is selected based on the Sum of Absolute Difference (SAD) value. In SoC this process can be implemented in parallel by using non-blocking modules for all the 35 modes. In order to improve the efficiency further, edge detection and content analysis modules are added to analyse the blocks before the modes are selected. This make sures that only required modes are executed based on the content that is present in the block. The traditional motion estimation module is improved by adding a hierarchical framework to select the best matching block more effectively. To solve the power consumption problems, Intelligent Clock Gating (ICG) is applied in order to switch off idle modules and hence reduce dynamic power consumption drastically. This low-power optimization results in extended operation times for portable devices while minimizing thermal footprint. The proposed methodology successfully improved the overall efficiency of the H.265 framework.