Energy Efficient and Low Power Rca Based Full Adder

Authors

  • RONAL WATRIANTHOS

DOI:

https://doi.org/10.31838/jvcs/02.01.02

Keywords:

Transmission gate based full adder, low-power consumption, algorithmic logic unit(ALU).

Abstract

Full adders are becoming the one of the most important and fundamental digital blocks in the present-day scenario. As the day by day circuit complexity increases its very much necessary to reduce the power consumption. In this paper we proposed a novel and reliable transmission gate based full adder. which occupies less are and reduces the power significantly. Hence these types of the adders can be extensively suitable for the design of ALU in the computers to perform the high-speed operations.

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Published

2020-03-10

How to Cite

RONAL WATRIANTHOS. (2020). Energy Efficient and Low Power Rca Based Full Adder. Journal of VLSI Circuits and Systems, 2(1), 6–10. https://doi.org/10.31838/jvcs/02.01.02

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Section

Articles