Design And Analysis Of 1-Bit Full Adder Using Cntfets

Authors

  • MURALIDHARAN J

DOI:

https://doi.org/10.31838/jvcs/02.01.04

Keywords:

Low leakage power, Carbon nanaotube field effect transistors, full adders, cadence virtuoso.

Abstract

As the technology is scales down beyond the certain limit it is going to be affect the performance of the system in terms of power, speed and etc. Hence in order to overcome the above issues researchers proposed a novel transistor such as carbon nano tube field effect transistors in the place of CMOS technology. In this paper we proposed a novel CNTFET based full adder circuits for digital application. this full adder circuit has been implemented using the 32 nm technology using the CNTFET model files. the proposed full adder circuit we have measured the delay, power and PDP by varying the output load (capacitance) and voltage respectively.

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Published

2020-03-10

How to Cite

MURALIDHARAN J. (2020). Design And Analysis Of 1-Bit Full Adder Using Cntfets. Journal of VLSI Circuits and Systems, 2(1), 14–17. https://doi.org/10.31838/jvcs/02.01.04

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Section

Articles