Statistical analysis of Gate Diffusion Input based full adders: from delay and Power perspective

Abstract

Full adder is one of the primary blocks in the current day modern electronic devices, it could perform the all the arithmetic operations in the modern-day electronics. In this paper we proposed a GDI based full adder circuit and its variations were observed with respect to the statistical analysis such as Monte Carlo analysis. The proposed circuit were realized using cadence virtuoso 45 nm technology and observed performance with respect to delay and power.