Resource-Constrained VLSI Architecture for Wearable Health Monitoring: Integrating On-Chip Data Compression with CNN-Based Fall and Arrhythmia Detection

Abstract

Wearable biomedical devices need to achieve two opposing goals, which require them to process data instantaneously while consuming minimal power to maintain their battery power throughout extended periods. The standard processing system, which most systems use, depends on cloud computing, but this method creates security vulnerabilities and time delays for users. The research introduces a new low-power AI-based Very-Large-Scale Integration (VLSI) design that scientists created specifically for use in wearable health monitoring devices that need to detect falls and identify cardiac arrhythmias. The primary development of this project is the creation of a hardware-based preprocessing compression unit that employs delta-encoding to reduce data duplication prior to the neural network performing its computations. Our system uses a lightweight convolutional neural network accelerator, which processes accelerometer and ECG data using mixed-precision arithmetic at the edge. The architectural design achieves fall detection accuracy of 95.4% while requiring only 24.8 μJ of energy for each inference, according to simulation results obtained through 65 nm CMOS technology testing. The system provides the next generation of remote patient monitoring systems with essential energy-efficient design elements that produce a 28% better energy output when compared to existing baseline systems.