Fundamental Code Converter Block Design using Novel CMOS Architectures

Authors

  • M. Mejail
  • B.K. Nestares
  • L. Gravano
  • E. Tacconi
  • G.R. Meira
  • A. Desages

DOI:

https://doi.org/10.31838/jvcs/04.02.06

Keywords:

ADC; ASICs; Binary; Decoder; Delay; FinFET; Multiplexer; Power; Thermometer

Abstract

In this paper, a decoder is designed to convert the binary data to thermometer code. This paper involves a 4-bit decoder such that it consists of 4 inputs and 15 outputs. This decoder is designed in two different ways; IG-LP mode decoder and multiplexer based decoder. The IG-LP mode decoder is designed using the truth table of binary to thermometer decoder. This logic based decoder consists of 15 different logics, which are developed using the FinFET technology. The multiplexer based decoder is designed
using 2:1 multiplexer circuits. These 2:1 multiplexers are also designed using FinFET technology. FinFET 18nm spectre models are used in cadence to design and simulations of proposed circuits. The performance validation has done with respect to power consumption, delay, PDP and EDP of both the designs.

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Published

2022-09-20

How to Cite

M. Mejail, B.K. Nestares, L. Gravano, E. Tacconi, G.R. Meira, & A. Desages. (2022). Fundamental Code Converter Block Design using Novel CMOS Architectures. Journal of VLSI Circuits and Systems, 4(2), 38–45. https://doi.org/10.31838/jvcs/04.02.06

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Section

Articles