Analysis of Low power and reliable XOR-XNOR circuit for high Speed Applications

Abstract

This paper presents a comprehensive study of different types of XOR-XNOR circuits. Our main focus is to characterise the XOR-XNOR combinational circuit design using six transistors for low power applications. The six transistor XOR-XNOR circuit can be simulated using 45nm CMOS technology in cadence virtuoso using foundry files. The simulation results demonstrates, parameters such as power, delay and power delay product(PDP) at different voltages ranging from 0.4 to 1v respectively. From the obtained results it clearly indicates the proposed design has low power consumption and full voltage