An Innovative Design of Decoder Circuit using Reversible Logic

Abstract

Reversible logic has been widely used in the field of VLSI. In this paper, we introduce a method that enables the designers to implement this technique in their decoder circuits. In Logical Reversibility is not allowed for Fan-out and Feed-back. It is primarily used for applications in various sectors such as Computer Graphics, High Performance Computing, and Nanoscale. This paper presents a reversible logic circuit with respect to its energy consumption. It is mainly useful for minimizing the need for power supply. The comparison study on garbage output and quantum cost of gates is presented