Ultra Low Potential Operated Fundamental Arithmetic Module Design for High-Throughput Applications

Abstract

The multiplier is an electronic circuit used in digital electronics [1], to multiply two binary numbers. The advantages of the multiplier are low power consumption, regularity of layout, less chip area, high speed etc. Multiplier plays an important role in today’s digital processing and various applications. Multipliers are the key components in some high speed systems such as FIR filters, microprocessors, ALU and other commercial applications like computers, mobiles, high speed calculators and some general-purpose processors require binary multipliers. Since last few years, the tiny size of MOSFET, that is less than tens of nanometers, created some operational problems such as increased gate-oxide leakage, amplified junction leakage, high sub threshold conduction and reduced output resistance. To overcome the above problems, FinFET has the advantages of an increase in the operating speed, reduced
power consumption, reduced static leakage current is used to realize the majority of the applications by replacing MOSFET. By considering the attractive features of the FinFET, a multiplier is designed as an application. Sequential circuits are extensively used in the design of memory elements such as flip flops and register. Registers are used as data storage devices in low power VLSI designs. The design is simulated using Cadence virtuoso with 20nm technology. Comparative performance analysis is carried out in contrast to the other standard circuits by taking the important performance metrics such as delay, power and power delay product (PDP), energy delay product (EDP) metrics into consideration.