Vol. 5 No. 02 (2023): JVCS

Articles

• Fundamental Digital Module Realization Using RTL Design for Quantum Mechanics

  Chandrakumar Rasanjani, Anuradha K. Madugalla, Manthila Perera

  1-7

  • pdf

• Digital Filter based Adder Module Realization High-Speed Switching Functions

  Nabeel Al-Yateem, Leila Ismail, M. Ahmad

  8-14

  • pdf

• Universal Shift Register: QCA based Novel Technique for Memory Storage Modules

  Sungho Jeon, Hyunjae Lee, Hee-Seob Kim, Yeonjin Kim

  15-21

  • pdf

• CSA Implementation Using Novel Methodology: RTL Development

  Kriti S. Chakma, Md. Sarwar U. Chowdhury

  22-28

  • pdf

• FPGA Application: Realization of IIR filter based Architecture

  El Manaa Barhoumi, Y. Charabi, S. Farhani

  29-35

  • pdf

• XOR Module based Adder Applications Design using QCA

  Lau W. Cheng, Beh L. Wei

  36-42

  • pdf

• Digital Filter Design: Novel Multiplier Realization

  Rozman Zakaria, F. Mohd Zaki

  43-49

  • pdf

• Next Generation Semiconductor based Fundamental Computation Module Implementation

  Chuong Van, MH Trinh, T Shimada

  50-55

  • pdf

• FPGA based Digital Filter Design for faster operations

  Kh. Ariunaa, U. Tudevdagva, M. Hussai

  56-62

  • pdf